EC8392 Digital Electronics Syllabus Notes Question Paper Question Banks with answers Anna University
Anna University Digital Electronics Syllabus Notes Question Bank Question Papers Regulation 2017
Anna University EC8392 Digital Electronics Notes are provided below. EC8392 Notes all 5 units notes are uploaded here. here EC8392 Digital Electronics notes download link is provided and students can download the EC8392 DE Lecture Notes and can make use of it.
EC8392 Digital Electronics Syllabus Regulation 2017
UNIT I DIGITAL FUNDAMENTALS
Number Systems – Decimal, Binary, Octal, Hexadecimal, 1‗s and 2‗s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization.
UNIT II COMBINATIONAL CIRCUIT DESIGN
Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS
Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM - Programmable Logic Devices – Programmable Logic Array (PLA) - Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) - Implementation of combinational logic circuits using PLA, PAL. Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan-in, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS
Number Systems – Decimal, Binary, Octal, Hexadecimal, 1‗s and 2‗s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization.
UNIT II COMBINATIONAL CIRCUIT DESIGN
Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS
Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM - Programmable Logic Devices – Programmable Logic Array (PLA) - Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) - Implementation of combinational logic circuits using PLA, PAL. Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan-in, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS
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